传感器和通信中的CMOS级联式Sigma

出版时间：2007-8  出版社：科学出版社有限责任公司  作者：麦迪瑞  页数：299  
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内容概要

　　CMOS级联式Sigma-Delta调节器是近年来研究的热点，作为一种较新的结构形式，国内外都比较重视。尤其是对于ADC的研究，作为数模混合CMOS电路的研究典型，在国内非常热。《传感器和通信中的CMOS级联式Sigma-Delta调制器（影印版）》对sigma-delta调制器作了全面的分析，深入探讨了其在传感器接口和无线通信中的应用。对误差分析、级连结构、电路、模型，以及实际设计重点考虑的内容，都进行了全面的阐述。《传感器和通信中的CMOS级联式Sigma-Delta调制器（影印版）》与其他同类书不同之处在于其完整、深入地对开关电容电路的误差进行了详细分析。　　《传感器和通信中的CMOS级联式Sigma-Delta调制器（影印版）》内容全面、由浅入深、适用面广、适合相关专业的高级科技工作者和研究生参考，对高年级本科生也具有参考价值。

书籍目录

PrefaceList of AbbreviationsCHAPTER 1 ∑△ ADCs: Principles, Architectures, and State of the Art1.1. Analog-to-Digital Conversion: Fundamentals1.1.1. Sampling1.1.2. Quantization1.2. Oversampling ∑△ ADCs: Fundamentals1.2.1. Oversampling1.2.2. Noise-shaping1.2.3. Basic architecture of oversampling ZA ADCs1.2.4. Performance metrics1.2.5. Ideal performance1.3. Single-Loop ∑△ Architectures1.3.1. 1st-order ∑△ modulator1.3.2. 2nd-order ∑△ modulator1.3.3. High-order ∑△ modulatorsStability concernsOptimized NTFsHigh-order topologiesNon-linear stabilization techniques1.4. Cascade ∑△ Architectures1.5. Multi-Bit ∑△ ArchitecturesInfluence of DAC errors1.5.1. Element trimming and analog calibration1.5.2. Digital correction1.5.3. Dynamic element matching1.5.4. Dual-quantizationLeslie-Singh architectureSingle-loop ∑△MsCascade ∑△Ms1.6. Parallel ∑△ Architectures1.6.1. Frequency division multiplexing1.6.2. Time division multiplexing1.6.3. Code division multiplexing1.7. State of the Art in ∑△ ADCs1.8. SummaryCHAPTER 2 Non-ldeal Performance of ∑△ Modulators2.1. Integrator LeakageLeaky integrator2.1.1. Single-loop ∑△ modulators1st-order loop2nd-order loopLth-order loops2.1.2. Cascade ∑△ modulators2.2. Capacitor Mismatch2.2.1. Single-loop ∑△ modulators2nd-order loopLth-order loops2.2.2. Cascade ∑△ modulators2.3. Integrator Settling Error2.3.1. Model for the transient response of SC integratorsSC integrator modelTransient during integrationTransient during samplingIntegration-sampling process2.3.2, Validation of the proposed modelComparison with experimental resultsComparison with traditional models2.3.3. Effect of the amplifier finite gain-bandwidth productSingle-loop ∑△ modulatorsCascade ∑△ modulators2.3.4. Effect of the amplifier finite slew rate2.3.5. Effect of the switch finite on-resistanceEffect on an ideal integratorEffect on the amplifier GBEffect on the amplifier SR2.4. Circuit Noise2.4.1. Noise in track-and-holdsTrack component……CHAPTER 3 A Wideband ZA Modulator in 3．3-V 0．35-um CMOSCHAPTER 4 A∑△Modulator in 2．5-V 0．25-um CMOS for ADSUADSL+CHAPTER 5 A∑△Modulator with Programmable Signal Gain for Automotive Sensor Inte~acesAPPENDIX A An Expandible Family of Cascade∑△ModulatorsAPPENDIX B Power Estimator for Cascade∑△ModulatorsREFERENCESIndex